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电子发烧友网>电子资料下载>IC datasheet pdf>MM54HC4051/MM74HC4051 pdf data

MM54HC4051/MM74HC4051 pdf data

2008-08-06 | rar | 133 | 次下载 | 5积分

资料介绍

MM54HC4051/MM74HC4051
8-Channel Analog Multiplexer
MM54HC4052/MM74HC4052
Dual 4-Channel Analog Multiplexer
MM54HC4053/MM74HC4053
Triple 2-Channel Analog Multiplexer
General Description
These multiplexers are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low ``on'' resistance and low ``off''
leakages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Also these
switches contain linearization circuitry which lowers the on
resistance and increases switch linearity. These devices allow
control of up to g6V (peak) analog signals with digital
control signals of 0 to 6V. Three supply pins are provided for
VCC, ground, and VEE. This enables the connection of 0±5V
logic signals when VCCe5V and an analog input range of
g5V when VEEe5V. All three devices also have an inhibit
control which when high will disable all switches to their off
state. All analog inputs and outputs and digital inputs are
protected from electrostatic damage by diodes to VCC and
ground.
MM54HC4051/MM74HC4051: This device connects together
the outputs of 8 switches, thus achieving an 8 channel
Multiplexer. The binary code placed on the A, B, and C
select lines determines which one of the eight switches is
``on'', and connects one of the eight inputs to the common
output.
MM54HC4052/MM74HC4052: This device connects together
the outputs of 4 switches in two sets, thus achieving
a pair of 4-channel multiplexers. The binary code placed on
the A, and B select lines determine which switch in each 4
channel section is ``on'', connecting one of the four inputs in
each section to its common output. This enables the implementation
of a 4-channel differential multiplexer.
MM54HC4053/MM74HC4053: This device contains 6
switches whose outputs are connected together in pairs,
thus implementing a triple 2 channel multiplexer, or the
equivalent of 3 single-pole-double throw configurations.
Each of the A, B, or C select lines independently controls
one pair of switches, selecting one of the two switches to be
``on''.
Features
Y Wide analog input voltage range: g6V
Y Low ``on'' resistance: 50 typ. (VCC±VEEe4.5V)
30 typ. (VCC±VEEe9V)
Y Logic level translation to enable 5V logic with g5V
analog signals
Y Low quiescent current: 80 mA maximum (74HC)
Y Matched Switch characteristic
74HC4
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