SN74LVC137A,pdf(3-Line To 8-Li

This 3-line to 8-line decoder/demultiplexer with latches on three address inputs is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVC137A is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

When the latch-enable (G2A\) input is low, the SN74LVC137A acts as a decoder/demultiplexer.