采用FPGA的高速CCD相机的时钟发生器

采用IL2E2 TDI CCD 做为传感器,与计算机构成了成像系统,并在计算机CRT 上显示出图像。主要介绍高速CCD 相机的工作时钟产生电路的设计,采用大规模集成电路FPGA 实现了该工作时钟驱动电路,采用AHDL 语言对工作时钟驱动电路进行了硬件描述,并利用Max Plus2 软件对所设计的工作时钟驱动电路进行了仿真,最后对FPGA 器件进行了编程和硬件电路调试,进而实现了整个CCD 相机的控制。
关键词: 电荷耦合器件; 时间延迟积分; 现场可编程逻辑阵列
Abstract : An image system is constructed with a PC computer by using IL2E2 TDI CCD sensor. The images are displayed in the CRT of the computer. The design to the timing generator of a high speed CCD camera is mainly described by using FPGA. The hardware description to the timing generator circuits is realized by using the AHDL language. The simulation to the timing generator circuits is made by using Max Plus2 software. Finally ,
after programming a FPGA chip and making the experiment of the circuits , the control of a CCD camera is real2 ized.
Key words : charge coupled device (CCD) ; time delay integration ( TDI) ; fied programable gate arry (FPGA)