CY27EE16ZE pdf datasheet

The CY27EE16ZE integrates a 16-kbit EEPROM scratchpad
and a clock generator that features Cypress’s programmable
clock core. An industry standard I
2C serial programming
interface (SPI) is used to program the scratchpad and clock
core.
16-kbit EEPROM
The 16-kbit EEPROM scratchpad is organized in eight blocks
x 256 words x 8 bits. Each of the eight 2-kbit EEPROM
scratchpad blocks, a 2-kbit clock configuration EEPROM
block, and a 2-kbit volatile clock configuration SRAM block,
have their own 7-bit device address. The device address is
combined with a Read/Write bit as the LSB and is sent after
each start bit.
Clock Features
The programmable clock core is configured with the following
features:
• Crystal Oscillator: Programmable drive and load, support
for external references up to 166 MHz. See "Reference
Frequency (REF)", page 5
• VCX Analog or digital control
• Inputs and I/Os: Programmable input muxes drive write
protect (WP), analog VCXO control, output enable (OE),
and power down mode (PDM) functions
• PLL: Programmable P, Q, offset, and loop filter parameters.
Outputs: Six outputs and two programmable linear dividers.
The output swing of CLOCK1 through CLOCK4 is set by VDDL
(2.5V or 3.3V). The output swing of CLOCK5 and CLOCK6 is
set by VDD (3.3V).