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SM320VC5507-EP 增强型产品定点数字信号处理器

数据:

描述

The SM320VC5507 fixed-point digital signal processor (DSP) is based on the SMS320C55x DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform up to two data transfers per cycle independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit x 17-bit multiplication in a single cycle. A central 40-bit arithmetic/logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x DSP generation supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The Program Unit decodes the instructions, directs tasks to AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The 128K bytes of on-chip memory on 5507 is sufficient for many hand-held appliances, portable GPS systems, wireless speaker phones, portable PDAs, and gaming devices. Many of these appliances typically require 64K bytes or more on-chip memory but less than 128K bytes of memory, and need to operate in standby mode for more than 60% to 70% of time. For the applications which require more than 128K bytes of on-chip memory but less than 256K bytes of on-chip memory, Texas Instruments (TI) offers the TMS320VC5509A device, which is based on the TMS320C55x DSP core.

The general-purpose input and output functions and the10-bit A/D provide sufficient pins for status, interrupts, and bit I/O for LCDs, keyboards, and media interfaces. The parallel interface operates in two modes, either as a slave to a microcontroller using the HPI port or as a parallel media interface using the asynchronous EMIF. Serial media is supported through three McBSPs.

The 5507 peripheral set includes an external memory interface (EMIF) that provides glueless access to asynchronous memories like EPROM and SRAM, as well as to high-speed, high-density memories such as synchronous DRAM. Additional peripherals include Universal Serial Bus (USB), real-time clock, watchdog timer, and I2C multi-master and slave interface. Three full-duplex multichannel buffered serial ports (McBSPs) provide glueless interface to a variety of industry-standard serial devices, and multichannel communication with up to 128 separately enabled channels. The enhanced host-port interface (HPI) is a 16-bit parallel interface used to provide host processor access to 32K bytes of internal memory on the 5507. The HPI can be configured in either multiplexed or non-multiplexed mode to provide glueless interface to a wide variety of host processors. The DMA controller provides data movement for six independent channel contexts without CPU intervention, providing DMA throughput of up to two 16-bit words per cycle. Two general-purpose timers, up to eight dedicated general-purpose I/O (GPIO) pins, and digital phase-locked loop (DPLL) clock generation are also included.

The 5507 is supported by the industry’s award-winning eXpressDSP™, Code Composer Studio™ Integrated Development Environment (IDE), DSP/BIOS™, Texas Instruments’ algorithm standard, and the industry’s largest third-party network. The Code Composer Studio IDE features code generation tools including a C Compiler and Visual Linker, simulator, RTDX™, XDS510™ emulation device drivers, and evaluation modules. The 5507 is also supported by the C55x DSP Library which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip and board support libraries.

特性

  • 高性能,低功耗,定点
    SMS320C5507数字信号处理器
    • 9.26-,6.95- ,5 ns指令周期时间
    • 108,144,200 MHz时钟频率
    • 每个周期执行一/两条指令
    • Dual乘法器(高达4亿 - 每秒累加(MMACS))
    • 两个算术/逻辑单元(ALU)
    • 三个内部数据/操作数读取总线
      和两个内部数据/操作数写总线
  • 64K x 16位片上RAM,​​由以下部分组成:
    • 64K字节的双存取RAM( DARAM)8
      4K x 16位块
    • 64K字节的单访问RAM(SARAM)8
      4K x 16位块
    < /li>
  • 64K字节的单等待状态片上ROM
    (32K x 16位)
  • 8M x 16位最大可寻址外部存储空间(同步) DRAM)
  • 16位外部并行总线存储器
    支持:
    • 带GPIO的外部存储器接口(EMIF)
      功能和Gluel ess接口:
      • 异步静态RAM(SRAM)
      • 异步EPROM
      • 同步DRAM(SDRAM)
    • < li>具有GPIO功能的16位并行增强型主机端口接口(EHPI)
  • 六个设备功能域的可编程低功耗控制
  • 基于片上扫描的仿真逻辑
  • 片上外设
    • 两个20位定时器
    • 看门狗定时器
    • 六通道直接存储器访问(DMA)控制器
    • 三个多通道缓冲串行端口(McBSP)
    • 可编程锁相环时钟发生器
    • 七(LQFP) )或八个(BGA)通用I /O(GPIO)
      引脚和通用输出引脚(XF)
    • USB全速(12 Mbps)从端口支持批量,< br>中断和同步传输
    • 内部集成电路(I 2 C)多主机和从机接口
    • 实时时钟( RTC)具有晶体输入,独立时钟
      域,独立电源y
    • 4通道(BGA)或2通道(LQFP)10位
      逐次逼近A /D
  • IEEE Std 1149.1 (1)(JTAG)边界扫描逻辑
  • 封装:
    • 144端子薄型四方扁平封装(LQFP)
      (PGE后缀)< /li>
  • 1.2-V内核(108 MHz),2.7 V? 3.6V I /O
  • 1.35-V内核(144 MHz),2.7 V? 3.6V I /O
  • 1.6V内核(200 MHz),2.7 V? 3.6-VI /Os
  • 支持国防,航空和医疗应用
    • 受控基线
    • 一个装配/测试现场
    • 一个制造现场
    • 军用(?? 55°C /125°C)温度范围(2)
    • 延长产品生命周期
    • 扩展产品变更通知
    • 产品可追溯性

(1) IEEE标准1149.1 -1990标准测试访问端口和边界扫描架构。
(2)可提供更多温度范围 - 联系工厂
C55x,eXpressDSP,Code Composer Studio,DSP /BIOS,RTDX,XDS510,TMS320,TMS320C5000,TMS320C55x,TMS320C55x是商标德州仪器。

参数 与其它产品相比 C5000 DSP

 
Applications
Operating Systems
DSP
DSP MHz
DRAM
Operating Temperature Range (C)
SPI
I2C
Rating
SM320VC5507-EP
Audio
Automotive
Communications and Telecom
Industrial    
DSP/BIOS
VLX    
1 C55x    
108
144
200    
SDRAM    
-55 to 85    
0    
1    
HiRel Enhanced Product    

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