TI公司的CAN4550-Q1是集成了收发器的汽车控制器局域网络(CAN)灵活数据速率(FD)控制器,支持数据速率高达标8Mbps,满足ISO11898-1:2015高速CAN数据链接层的指标,满足ISO11898–2:2016高速CAN指标.器件通过串行外设接口(SPI)提供CAN总线和系统处理器间接口,支持经典CAN和CAN FD.CAN4550-Q1提供CAN FD收发器功能:差分发送数据到总线和从总线差分接收数据.器件包括许多保护特性,使得设备和CAN总线鲁棒性.CAN总线工作时有两个逻辑状态:隐性和显性.在隐性总线状态,总线通过每个节点的接收器高阻抗内部输入电阻偏压到共通节点的2.5V,隐性状态等效于逻辑高电平,可是空闲状态.而在显性总线状态,总线由一个或多个驱动器驱动,电流通过端电阻,在总线上产生差分电压.显性状态等效于逻辑低电平.CAN4550-Q1满足汽车应用的规范AEC Q100,工作温度–40℃到125℃,工作模式包括正常,待机,睡眠和故障等,3.3V-5V输入/输出逻辑支持微处理器.主要用在人体电子学和照明,信息娱乐和集群和工业运输.本文介绍了CAN4550-Q1主要特性,功能框图和简化电路,CAN收发器框图,SPI和数字IO框图,典型CAN应用电路以及评估模块TCAN4550 EVM主要特性,电路图和材料清单.
The TCAN4550-Q1 is a CAN FD controller with anintegrated CAN FD transceiver supporting data ratesup to 8 Mbps. The CAN FD controller meets thespecifications of the ISO11898-1:2015 high speedcontroller area network (CAN) data link layer andmeets the physical layer requirements of theISO11898–2:2016 high speed CAN specification. TheTCAN4550-Q1 provides an interface between theCAN bus and the system processor through serialperipheral interface (SPI), supporting both classicalCAN and CAN FD, allowing port expanision or CANsupport with processors that do not support CAN FD.
The TCAN4550-Q1 provides CAN FD transceiverfunctionality: differential transmit capability to the busand differential receive capability from the bus. Thedevice supports wake up via local wake up (LWU)and bus wake using the CAN bus implementing theISO11898-2:2016 Wake Up Pattern (WUP).The device includes many protection featuresproviding device and CAN bus robustness. Thesefeatures include failsafe mode, internal dominantstate timeout, wide bus operating range and a timeoutwatchdog as examples.
The TCAN4550-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8Mbps. The CAN FD controller meets the specifications of the ISO 11898-1:2015 high speed Controller AreaNetwork (CAN) data link layer and meets the physical layer requirements of the ISO 11898-2:2016 High SpeedController Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocolcontroller supporting both classical CAN and CAN FD up to 5 megabits per second (Mbps). The TCAN4550-Q1provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receivecapability from the bus. The device includes many protection features providing device and CAN bus robustness.
The device can also wake up via remote wake up using CAN bus implementing the ISO 11898-2:2016 Wake UpPattern (WUP). Input/Output support for 3.3 V and 5 V microprocessors using VIO pin for seamless interface. TheTCAN4550-Q1 has a Serial Peripheral Interface (SPI) that connects to a local microprocessor for the device ’sconfiguration; transmission and reception of CAN frames. The SPI interface supports clock rates up to 18 MHz.
The CAN bus has two logical states during operation: recessive and dominant.In the recessive bus state, the bus is biased to a common mode of 2.5 V via the high resistance internal inputresistors of the receiver of each node. Recessive is equivalent to logic high. The recessive state is also the idlestate.
In the dominant bus state, the bus is driven differentially by one or more drivers. Current flows through thetermination resistors and generates a differential voltage on the bus. Dominant is equivalent to logic low. Adominant state overwrites the recessive state.During arbitration, multiple CAN nodes may transmit a dominant bit at the same time. In this case the differentialvoltage of the bus will be greater than the differential voltage of a single driver.
• AEC Q100: qualified for automotive applications
– Temperature grade 1: –40℃ to 125℃ TA
• CAN FD controller with integrated CAN FDtransceiver and serial peripheral interface (SPI)
• CAN FD controller supports both ISO 11898-1:2015 and Bosch M_CAN Revision 188.8.131.52
• Meets the requirements of ISO 11898-2:2016
• Supports CAN FD data rates up to 8 Mbps with upto 18 MHz SPI clock speed
• Classic CAN backwards compatible
• Operating modes: normal, standby, sleep, andfailsafe
• 3.3 V to 5 V input/output logic support formicroprocessors
• Wide operating ranges on CAN bus
– ±58 V bus fault protection
– ±12 V common mode
• Integrated low drop out voltage regulator suppling5 V to CAN transceiver and up to 70 mA forexternal devices
• Optimized behavior when unpowered
– Bus and logic terminals are high impedance(No load to operating bus or application)
– Power up and down glitch free operation
• Body electronics and lighting
• Infotainment and cluster
• Industrial transportation
This user’s guide describes the TCAN4550 evaluation module (EVM). This EVM helps designers evaluatedevice performance, support fast development, and analyze Controller Area Network with Flexible Datarate (CAN FD) systems using TCAN4550 CAN FD physical layer transceiver devices.
The TCAN4550 EVM provides the user with the ability to evaluate the TI TCAN4550 CAN FD Controllerwith integrated CAN transceiver devices. Any MCU or SPI controller with an I/O voltage of 3.3 V or 5 Vmay be connected to the EVM through a standard interface header. The EVM features a polarity-protectedand EMC-filtered supply voltage that allows the EVM to operate from an external voltage from 6 V to 24 V.
A dual-channel LDO creates a 5-V, general-purpose voltage rail to source the LEDs and supporting ICs,and a variable VIO voltage rail that can be set to 5 V or 3.3 V to match the MCU signal level requirements.
The VIO or 5-V rail is also designed to source the supply voltage for the connected MCU to evaluate sleepmode and wake-up events.
• CAN FD controller with integrated CAN transceiver
• Operates from a battery voltage input VBAT (6 V to 24 V)
• Polarity protected and EMC filtered supply voltage
• Dual-channel LDO
– Selectable VIO (5-V, or 3.3-V) supply rails
– General-purpose 5-V supply rail
– Error monitoring and current-sense features
• CAN bus header and industry-standard DB-9 connector
• TVS diode pad (not populated)
• CAN bus transient signal injection/monitoring header
• CAN bus termination with disconnect headers
• Common-mode choke (bypassed with 0-Ω resistors by default)
• Status LEDs
• MCU interface header (SPI, GPIO, VIO, and 5-V)
• Reset push-button switch
• Configuration DIP switches for support of multiple use pins
• Crystal oscillator (40 MHz)
• External clock input and output SMA connectors
• High-voltage Inhibit and Wake signal header
• WAKE push-button switch
图8.评估模块TCAN4550 EVM MCU接口(SPI/GPIO)特性