The ADP5589 is a 19 I/O port expander with built-in keypad matrix decoder, programmable logic, reset generator and PWM generator. This reference design allows full programming of the device, and also includes Keypad Decoder Test Mode and Key Lock/Unlock Feature.

HW Platform(s):

• Spartan-6 LX9 Microboard (Avnet)
• Nexys™3 Spartan-6 FPGA Board (Digilent)
• Avnet ZedBoard
  

The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).

• Spartan-6 LX9 Microboard (Avnet)
• Nexys™3 Spartan-6 FPGA Board (Digilent)
• Avnet ZedBoard
  
• PmodIOXP ADP5589 (Digilent)
• PmodKYPD (Digilent)

• Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
• A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.

Extract the project from the archive file (ADP5589_.zip) to the location you desire.

To begin, connect the PmodKYPD to J1 connector of PmodIOXP. After that, connect the PmodIOXP board to J4 connector of LX9 board, pins 3 to 6 (see image below). You must use the extension cable provided, otherwise the I2C Interface will not work. . Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.

Extract the project from the archive file (ADP5589_.zip) to the location you desire.

To begin, connect the PmodKYPD to J1 connector of PmodIOXP. After that, connect the PmodIOXP board to JA connector of Nexys™3 board, pins JA3 to JA6 (see image below). You must use the extension cable provided, otherwise the I2C Interface will not work. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).

To begin, connect the PmodIOXP to JC1 connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).

Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the “sw” folder (../adp5589/sw/ADP5589.bit).

Run the download.bat script from the “../bin” folder downloaded from the github (see the links in the download section of the wiki page). The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.

If programming was successful, you should be seeing messages appear on the terminal window as shown in figures below. After programming the ADP5589 device, the program will display initialization messages, and afterwards it will enter Key Decoder Test Mode. In this mode, you can press any key on the PmodKYPD, and it will be displayed on the UART along with the corresponding event (press/release). Pressing the [F] key will exit Key Decoder Test Mode. Next the program will Lock the keypad. Unlocking it requires the combination [1] [A].

The reference design is a simple I2C interface for the ADP5589. The software programs the device, monitors and reports events, locks or unlocks the keypad. It can also be programmed to generate a PWM signal or implement simple digital logic. The information is displayed on a UART terminal.

The hardware I2C access allows reading or writing of any ADP5589 registers via the address, write and read data registers.

// Select between PS7 or AXI Interface
#define USE_PS7 	 1
// SPI used in the design
#define USE_SPI		 0
// I2C used in the design
#define USE_I2C		 1
// Timer (+interrupts) used in the design
#define USE_TIMER	 0
// External interrupts used in the design
#define USE_EXTERNAL     0
// GPIO used in the design
#define USE_GPIO         0

• ask questions about the FPGA reference design
• Example questions:

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