一种基于分组的低功耗变长解码器的设计

变长码作为一种最流行的数据压缩技术，已被许多数据压缩标准，如JPEG，MPEG-2和H.263 等作为编码方法。但由于解码过程中的循环依赖性，限制了解码吞吐率。本文介绍
了一种基于分组方法的低功耗变长解码器结构，它是利用变长编码本身的信息冗余降低功耗的,通过设计添加一个锁存器的方法来缩短变长解码器的关键路径，描述了一个对变长码表进行分组控制的有限状态机控制器，从而达到高吞吐率输出的目的。
关键词：低功耗；变长解码器；关键路径
Abstract：Variable-length code (VLC) is the most popular data-compression technique which has been used in many data compression standards, such as JPEG, MPEG-2, and H.263. The recursive iteration of the decoding process limits the achievable decoding throughput. A low
power variable length decoding architecture based on table partitioning is presented, which exploits the signal statistics of variable length codes. High throughput was achieved mainly by adding a latch to reduce the critical path of the VLD. And a kind of method to design the finite state machine (FSM) controller is proposed, which is used to partition the VLC table.
Keywords: low power; variable length decoder (VLD); critical path