资料介绍
The DDC112 is a dual input, wide dynamic range, chargedigitizing
analog-to-digital (A/D) converter with 20-bit resolution.
Low-level current output devices, such as photosensors,
can be directly connected to its inputs. Charge integration is
continuous as each input uses two integrators; while one is
being digitized, the other is integrating.
For each of its two inputs, the DDC112 combines current-tovoltage
conversion, continuous integration, programmable
full-scale range, A/D conversion, and digital filtering to achieve
a precision, wide dynamic range digital result. In addition to
the internal programmable full-scale ranges, external integrating
capacitors allow an additional user-settable full-scale
range of up to 1000pC.
To provide single-supply operation, the internal A/D converter
utilizes a differential input, with the positive input tied to VREF.
When the integration capacitor is reset at the beginning of
each integration cycle, the capacitor charges to VREF. This
charge is removed in proportion to the input current. At the
end of the integration cycle, the remaining voltage is compared
to VREF.
The high-speed serial shift register which holds the result of
the last conversion can be configured to allow multiple DDC112
units to be cascaded, minimizing interconnections. The
DDC112 is available in an SO-28 or TQFP-32 package and is
offered in two performance grades.
analog-to-digital (A/D) converter with 20-bit resolution.
Low-level current output devices, such as photosensors,
can be directly connected to its inputs. Charge integration is
continuous as each input uses two integrators; while one is
being digitized, the other is integrating.
For each of its two inputs, the DDC112 combines current-tovoltage
conversion, continuous integration, programmable
full-scale range, A/D conversion, and digital filtering to achieve
a precision, wide dynamic range digital result. In addition to
the internal programmable full-scale ranges, external integrating
capacitors allow an additional user-settable full-scale
range of up to 1000pC.
To provide single-supply operation, the internal A/D converter
utilizes a differential input, with the positive input tied to VREF.
When the integration capacitor is reset at the beginning of
each integration cycle, the capacitor charges to VREF. This
charge is removed in proportion to the input current. At the
end of the integration cycle, the remaining voltage is compared
to VREF.
The high-speed serial shift register which holds the result of
the last conversion can be configured to allow multiple DDC112
units to be cascaded, minimizing interconnections. The
DDC112 is available in an SO-28 or TQFP-32 package and is
offered in two performance grades.
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