SN74ABT125Q-Q1,pdf(Quadruple B

The SN74ABT125Q-Q1 quadruple bus buffer gate features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

This device is fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.