AS1153/AS1155 pdf datasheet

The AS1153/55/57/58 are Single/Dual flow-through LVDS (low-voltage differential signaling) receivers which accept LVDS differential inputs and convert them to LVCMOS outputs. The receivers are perfect for lowpower low-noise applications requiring high signaling rates and reduced EMI emissions.

The devices are guaranteed to receive data at speeds up to 260Mbps (130MHz) over controlled impedance media of approximately 100Ω. Supported transmission media are PCB traces, backplanes, and cables.

The AS1155/58 are single LVDS receivers, and the AS1153/57 are dual LVDS receivers.

The AS1157/58 features integrated parallel termination resistors (nominally 107Ω), which eliminate the requirement for discrete termination resistors, and reduce stub lengths. The AS1153/55 uses high impedance inputs and requires an external termination resistor when used in a point-to-point connection.

The integrated Failsafe feature sets the output high if the inputs are open, undriven and terminated, or undriven and shorted.

All inputs conform to the ANSI TIA/EIA- 644 LVDS standards. Flow-through pinout simplifies PC board layout and reduces crosstalk by separating the LVDS inputs and LVCMOS outputs.

The devices are available in an 8-pin SOIC package.