| Resolution (Bits) | 12 |
| Number of channels (#) | 1 |
| Samples/sec (MSPS) | 36 |
| Supply voltage (Max) | 3.3 |
| Operating temperature range (C) | -25 to 85 |
| Output data format | CMOS Parallel |
- CCD Signal Processing:
- 36-MHz Correlated Double Sampling (CDS)
- 12-Bit Analog-to-Digital Conversion:
- 36-MHz Conversion Rate
- No Missing Codes Ensured
- 78-dB Input-referred SNR (at CDS Gain 0 dB)
- Programmable Black Level Clamping
- Programmable Gain Amp (PGA):
–9 dB to +35 dB, –3 dB to +9 dB
by Analog Front Gain (CDS)
–6 dB to +26 dB by Digital Gain - Portable Operation:
- Low Voltage: 2.7 V to 3.6 V
- Low Power: 85 mW at 3.0 V and 36 MHz,
1 mW in Standby Mode
- QFN-36 Package
All trademarks are the property of their respective owners.
The VSP2582 is a complete mixed-signal processing IC for digital cameras that provides correlated double sampling (CDS) and analog-to-digital conversion (ADC) for the output of charge-coupled device (CCD) array. The CDS extracts video information of the pixels from the CCD signal, and the ADC converts it to a digital signal. For varying illumination conditions, –9 dB to +35 dB very stable gain control is provided. This gain control is linear in dB. Input signal clamping and offset correction of the input CDS are also provided.
Offset correction is performed by an Optical Black (OB) level calibration loop, and held at a calibrated black level clamping for an accurate black level reference. Additionally, the black level is quickly recovered after a gain change.
The VSP2582 is available in a QFN-36 package, and operates from a single +3 V supply. The RHH package features an exposed thermal pad, resulting in substantially improved thermal performance.
