--- 产品详情 ---
| Sample rate (Max) (MSPS) | 3000 |
| Resolution (Bits) | 8 |
| Number of input channels | 1 |
| Interface type | Parallel LVDS |
| Analog input BW (MHz) | 3000 |
| Features | Ultra High Speed |
| Rating | Catalog |
| Input range (Vp-p) | 0.82 |
| Power consumption (Typ) (mW) | 1900 |
| Architecture | Folding Interpolating |
| SNR (dB) | 45.4 |
| ENOB (Bits) | 7.2 |
| SFDR (dB) | 57 |
| Operating temperature range (C) | -40 to 85 |
| Input buffer | Yes |
Key Specifications
| Resolution | 8 Bits |
| Max Conversion Rate | 3 GSPS (min) |
| Error Rate | 10 |
| ENOB @ 748 MHz Input | 7.0 Bits (typ) |
| SNR @ 748 MHz | 44.5 dB (typ) |
| Full Power Bandwidth | 3 GHz (typ) |
| Operating | 1.9 W (typ) |
| Power Down Mode | 25 mW (typ) |
The ADC083000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.9 Watts at 3 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.0 Effective Number Of Bits, (ENOB) with a 748 MHz input signal and a 3 GHz sample rate while providing a 10
The ADC has a 1:4 demultiplexer that feeds four LVDS buses and reduces the output data rate on each bus to a quarter of the sampling rate.
The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C
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