多圈绝对值编码器AVM58N-011K1RHGN-1213

参数表节选：的技术参数  AVM58-H

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一、产品描述

二、应用领域

示例：

• 工业控制领域：工业、控制设备美。

 

三、应用电路图

示例：

SSI output format Standard ï At idle status signal lines "Data +" and "Clock +" are at high level (5 V). ï The first time the clock signal switches from high to low, the data transfer in which the current information (position data (Dn) and special bit (S)) is stored in the encoder is introduced. ï The highest order bit (MSB) is applied to the serial data output of the encoder with the first rising pulse edge. ï The next successive lower order bit is transferred with each following rising pulse edge. ï After the lowest order bit (LSB) has been transferred the data line switches to low until the monoflop time Tm has expired. ï No subsequent data transfer can be started until the data line switches to high again or the time for the clock pause Tp has expired. ï After the clock sequence is complete, the monoflop time Tm is triggered with the last falling pulse edge. ï The monoflop time Tm determines the lowest transmission frequency. SSI output format ring slide operation (multiple transmission) ï In ring slide operation, multiple transmission of the same data word over the SSI interface makes it possible to offer the possibility of detecting transmission errors. ï In multiple transmission, 25 bits are transferred per data word in standard format. ï If the clock change is not interrupted after the last falling pulse edge, ring slide operation automatically becomes active. This means that the information that was stored at the time of the first clock change is generated again. ï After the first transmission, the 26th pulse controls data repetition. If the 26th pulse follows after an amount of time greater than the monoflop time Tm, a new current data word will be transmitted with the following pulses.