系统级ESD：一盎司的预防胜过一磅重的治疗

　　系统级ESD：一盎司的预防胜过一磅重的治疗

　　这些天来，我有更多的客户互动像我最近做的。这似乎是一个有点疯狂的工程师为我们的团队在Semtech公司解决了他的系统级ESD问题的一些第十一小时的帮助。这个家伙被一些烦人的ESD尖峰伏击了。不仅他的产品没有遵守，但他甚至看到ESD诱导失败的一些早期田间试验。更糟糕的是，他很快就没时间解决这些问题了。他的管理变得越来越不耐烦，并增加压力，有一个大的，苛刻的最终客户等待这个产品。该计划不能容忍另一个延迟，情况越来越严重，当他向我们伸出手来。

　　当我们与工程师更多地了解这个问题的挑战和性质时，很明显，有一些简单的东西，如果应用在设计周期的前端，可以帮助创建一个“软着陆”解决问题。

　　First off， our friend had not implemented protection clamps at any of the I/O interfaces of the product. At a minimum， it would have been wise to layout the PCB pads for TVS clamps as a “safety valve” move should he need protection. Even if he did not populate those pads with ESD clamp devices， at least he would have allowed for the option to later do so. However， what really made this product an EMC challenge was the high-speed performance silicon driving the I/O. While the latest （65 nm， 45 nm and 28 nm） high-speed communication ICs offer incredible speed and power saving performance， they also tend to be more susceptible to latch-up or damage from fast rise-time ESD transients. As it was， even a weaker/lower threshold ESD zap could send his board out of commission.