mpc5602d单片机数据表

　　1.1 Document overview This document describes the device features and highlights the important electrical and physical characteristics. 1.2 Description These 32-bit automotive microcontrollers are a family of system-on-chip （SoC） devices designed to be central to the development of the next wave of central vehicle body controller， smart junction box， front module， peripheral body， door control and seat control applications. This family is one of a series of next-generation integrated automotive microcontrollers based on the Power Architecture technology and designed specifically for embedded applications. The advanced and cost-efficient e200z0h host processor core of this automotive controller family complies with the Power Architecture technology and only implements the VLE （variable-length encoding） APU （auxiliary processing unit）， providing improved code density. It operates at speeds of up to 48 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers， operating systems and configuration code to assist with the user’s implementations. The device platform has a single level of memory hierarchy and can support a wide range of on-chip static random access memory （SRAM） and internal flash memory.