IEEE Std 1364-2001 (Revision of IEEE Std 1364-1995)

IEEE Standard Verilog® Hardware Des cription Language Published by The Institute of Electrical and Electronics Engineers, Inc. 3 Park Avenue, New York, NY 10016-5997, USA
28 September 2001
IEEE Computer Society Sponsored by the Design Automation Standards Committee

Sponsor
Design Automation Standards Committee
of the
IEEE Computer Society
Approved 17 March 2001
IEEE-SA Standards Board
Abstract:
The Verilog
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Hardware Des cription Language (HDL) is defined in this standard. Verilog
HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because
it is both machine readable and human readable, it supports the development, verification,
synthesis, and testing of hardware designs; the communication of hardware design data; and the
maintenance, modification, and procurement of hardware. The primary audiences for this standard
are the implementors of tools supporting the language and advanced users of the language.
Keywords:
computer, computer languages, digital systems, electronic systems, hardware, hardware
des cription languages, hardware design, HDL, PLI, programming language interface, Verilog
HDL, Verilog PLI, Verilog
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