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The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be externally cascaded to implement a 3-line to 8-line decoder.
The circuit has two supply voltage inputs: the voltage monitor (bandgap) is powered via the VCC terminal; the internal logic of the circuit is powered via the Vbat terminal. In case VCC drops below 3.65 V (nominal), the voltage monitor forces the voltage-control (VS) and decoder outputs (Y) to the high level. VS may be used to disconnect the supply voltage of the memories (Vbat) from the system supply. This output is switched off when the on-chip supply voltage monitor detects a power failure.
The SN74BCT2414 is characterized for operation from 0°C to 70°C.
| Function |
| Technology Family |
| VCC (Min) (V) |
| VCC (Max) (V) |
| Channels (#) |
| Voltage (Nom) (V) |
| F @ Nom Voltage (Max) (Mhz) |
| ICC @ Nom Voltage (Max) (mA) |
| tpd @ Nom Voltage (Max) (ns) |
| Configuration |
| Type |
| IOL (Max) (mA) |
| IOH (Max) (mA) |
| Rating |
| Operating Temperature Range (C) |
| Package Group |
| Package Size: mm2:W x L (PKG) |
| Bits (#) |
| Digital input leakage (Max) (uA) |
| ESD Charged Device Model (kV) |
| ESD HBM (kV) |
| SN74BCT2414 |
|---|
| Decoder Demultiplexer |
| BCT |
| 4.5 |
| 5.5 |
| 2 |
| 5 |
| 70 |
| 3 |
| 12 |
| 2:4 |
| Standard |
| 20 |
| -0.4 |
| Catalog |
| 0 to 70 |
| PDIP SOIC |
| See datasheet (PDIP) 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) |
| 4 |
| 5 |
| 0.75 |
| 2 |
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